gcc-8.3/gcc/validate_subreg()
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*参照元 [#o903a114]
#backlinks
*説明 [#r84b05be]
-パス: [[gcc-8.3/gcc/emit-rtl.c]]
-FIXME: これは何?
--説明
**引数 [#o0f661cb]
-machine_mode omode
--
--[[gcc-8.3/gcc/machine_mode]]
-machine_mode imode
--
-const_rtx reg
--
--[[gcc-8.3/gcc/const_rtx]]
-poly_uint64 offset
--
--[[gcc-8.3/gcc/poly_uint64]]
**返り値 [#veb2f318]
-bool
--
**参考 [#s0bc73e9]
*実装 [#d7e0933d]
/* We want to create (subreg:OMODE (obj:IMODE) OFFSET). ...
this construct would be valid, and false otherwise. */
bool
validate_subreg (machine_mode omode, machine_mode imode,
const_rtx reg, poly_uint64 offset)
{
poly_uint64 isize = GET_MODE_SIZE (imode);
poly_uint64 osize = GET_MODE_SIZE (omode);
/* The sizes must be ordered, so that we know whether ...
is partial, paradoxical or complete. */
if (!ordered_p (isize, osize))
return false;
/* All subregs must be aligned. */
if (!multiple_p (offset, osize))
return false;
/* The subreg offset cannot be outside the inner objec...
if (maybe_ge (offset, isize))
return false;
-
--[[gcc-8.3/gcc/GET_MODE_SIZE()]]
--[[gcc-8.3/gcc/ordered_p()]]
--[[gcc-8.3/gcc/multiple_p()]]
--[[gcc-8.3/gcc/maybe_ge()]]
poly_uint64 regsize = REGMODE_NATURAL_SIZE (imode);
-
--[[gcc-8.3/gcc/REGMODE_NATURAL_SIZE()]]
/* ??? This should not be here. Temporarily continue ...
subregs of anything. The most common offender is (...
Generally, backends are doing something sketchy but...
fix them all. */
if (omode == word_mode)
;
/* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Tho...
is the culprit here, and not the backends. */
else if (known_ge (osize, regsize) && known_ge (isize,...
;
-
--[[gcc-8.3/gcc/known_ge()]]
/* Allow component subregs of complex and vector. Tho...
extraction rules, it's not always clear what that m...
else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imo...
&& GET_MODE_INNER (imode) == omode)
;
-
--[[gcc-8.3/gcc/COMPLEX_MODE_P()]]
--[[gcc-8.3/gcc/VECTOR_MODE_P()]]
--[[gcc-8.3/gcc/GET_MODE_INNER()]]
/* ??? x86 sse code makes heavy use of *paradoxical* v...
i.e. (subreg:V4SF (reg:SF) 0). This surely isn't t...
represent this. It's questionable if this ought to...
all -- why can't this all be hidden in post-reload ...
arbitrarily mode changes to the registers themselve...
else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omod...
;
/* Subregs involving floating point modes are not allo...
change size. Therefore (subreg:DI (reg:DF) 0) is f...
(subreg:SI (reg:DF) 0) isn't. */
else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
{
if (! (known_eq (isize, osize)
/* LRA can use subreg to store a floating point va...
an integer mode. Although the floating point and the
integer modes need the same number of hard registers,
the size of floating point mode can be less than the
integer mode. LRA also uses subregs for a register
should be used in different mode in on insn. */
|| lra_in_progress))
return false;
}
-
--[[gcc-8.3/gcc/FLOAT_MODE_P()]]
--[[gcc-8.3/gcc/known_eq()]]
/* Paradoxical subregs must have offset zero. */
if (maybe_gt (osize, isize))
return known_eq (offset, 0U);
-
--[[gcc-8.3/gcc/maybe_gt()]]
--[[gcc-8.3/gcc/known_eq()]]
/* This is a normal subreg. Verify that the offset is...
/* For hard registers, we already have most of these r...
subreg_offset_representable_p. */
if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
{
unsigned int regno = REGNO (reg);
if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imod...
&& GET_MODE_INNER (imode) == omode)
;
else if (!REG_CAN_CHANGE_MODE_P (regno, imode, omo...
return false;
return subreg_offset_representable_p (regno, imode...
}
-
--[[gcc-8.3/gcc/REG_P()]]
--[[gcc-8.3/gcc/HARD_REGISTER_P()]]
--[[gcc-8.3/gcc/REGNO()]]
--[[gcc-8.3/gcc/COMPLEX_MODE_P()]]
--[[gcc-8.3/gcc/VECTOR_MODE_P()]]
--[[gcc-8.3/gcc/GET_MODE_INNER()]]
--[[gcc-8.3/gcc/REG_CAN_CHANGE_MODE_P()]]
--[[gcc-8.3/gcc/subreg_offset_representable_p()]]
/* The outer size must be ordered wrt the register siz...
we wouldn't know at compile time how many registers...
mode occupies. */
if (!ordered_p (osize, regsize))
return false;
-
--[[gcc-8.3/gcc/ordered_p()]]
/* For pseudo registers, we want most of the same chec...
Assume that the pseudo register will be allocated t...
that can hold REGSIZE bytes each. If OSIZE is not ...
the remainder must correspond to the lowpart of the...
register. If BYTES_BIG_ENDIAN, the lowpart is at t...
otherwise it is at the lowest offset.
Given that we've already checked the mode and offse...
we only have to check subblock subregs here. */
if (maybe_lt (osize, regsize)
&& ! (lra_in_progress && (FLOAT_MODE_P (imode) || ...
{
/* It is invalid for the target to pick a register...
that isn't ordered wrt to the size of that mode. */
poly_uint64 block_size = ordered_min (isize, regsi...
unsigned int start_reg;
poly_uint64 offset_within_reg;
if (!can_div_trunc_p (offset, block_size, &start_r...
|| (BYTES_BIG_ENDIAN
? maybe_ne (offset_within_reg, block_size - osize)
: maybe_ne (offset_within_reg, 0U)))
return false;
}
-
--[[gcc-8.3/gcc/maybe_lt()]]
--[[gcc-8.3/gcc/FLOAT_MODE_P()]]
--[[gcc-8.3/gcc/ordered_min()]]
--[[gcc-8.3/gcc/can_div_trunc_p()]]
--[[gcc-8.3/gcc/maybe_ne()]]
return true;
}
*コメント [#t2a45f65]
終了行:
*参照元 [#o903a114]
#backlinks
*説明 [#r84b05be]
-パス: [[gcc-8.3/gcc/emit-rtl.c]]
-FIXME: これは何?
--説明
**引数 [#o0f661cb]
-machine_mode omode
--
--[[gcc-8.3/gcc/machine_mode]]
-machine_mode imode
--
-const_rtx reg
--
--[[gcc-8.3/gcc/const_rtx]]
-poly_uint64 offset
--
--[[gcc-8.3/gcc/poly_uint64]]
**返り値 [#veb2f318]
-bool
--
**参考 [#s0bc73e9]
*実装 [#d7e0933d]
/* We want to create (subreg:OMODE (obj:IMODE) OFFSET). ...
this construct would be valid, and false otherwise. */
bool
validate_subreg (machine_mode omode, machine_mode imode,
const_rtx reg, poly_uint64 offset)
{
poly_uint64 isize = GET_MODE_SIZE (imode);
poly_uint64 osize = GET_MODE_SIZE (omode);
/* The sizes must be ordered, so that we know whether ...
is partial, paradoxical or complete. */
if (!ordered_p (isize, osize))
return false;
/* All subregs must be aligned. */
if (!multiple_p (offset, osize))
return false;
/* The subreg offset cannot be outside the inner objec...
if (maybe_ge (offset, isize))
return false;
-
--[[gcc-8.3/gcc/GET_MODE_SIZE()]]
--[[gcc-8.3/gcc/ordered_p()]]
--[[gcc-8.3/gcc/multiple_p()]]
--[[gcc-8.3/gcc/maybe_ge()]]
poly_uint64 regsize = REGMODE_NATURAL_SIZE (imode);
-
--[[gcc-8.3/gcc/REGMODE_NATURAL_SIZE()]]
/* ??? This should not be here. Temporarily continue ...
subregs of anything. The most common offender is (...
Generally, backends are doing something sketchy but...
fix them all. */
if (omode == word_mode)
;
/* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Tho...
is the culprit here, and not the backends. */
else if (known_ge (osize, regsize) && known_ge (isize,...
;
-
--[[gcc-8.3/gcc/known_ge()]]
/* Allow component subregs of complex and vector. Tho...
extraction rules, it's not always clear what that m...
else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imo...
&& GET_MODE_INNER (imode) == omode)
;
-
--[[gcc-8.3/gcc/COMPLEX_MODE_P()]]
--[[gcc-8.3/gcc/VECTOR_MODE_P()]]
--[[gcc-8.3/gcc/GET_MODE_INNER()]]
/* ??? x86 sse code makes heavy use of *paradoxical* v...
i.e. (subreg:V4SF (reg:SF) 0). This surely isn't t...
represent this. It's questionable if this ought to...
all -- why can't this all be hidden in post-reload ...
arbitrarily mode changes to the registers themselve...
else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omod...
;
/* Subregs involving floating point modes are not allo...
change size. Therefore (subreg:DI (reg:DF) 0) is f...
(subreg:SI (reg:DF) 0) isn't. */
else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
{
if (! (known_eq (isize, osize)
/* LRA can use subreg to store a floating point va...
an integer mode. Although the floating point and the
integer modes need the same number of hard registers,
the size of floating point mode can be less than the
integer mode. LRA also uses subregs for a register
should be used in different mode in on insn. */
|| lra_in_progress))
return false;
}
-
--[[gcc-8.3/gcc/FLOAT_MODE_P()]]
--[[gcc-8.3/gcc/known_eq()]]
/* Paradoxical subregs must have offset zero. */
if (maybe_gt (osize, isize))
return known_eq (offset, 0U);
-
--[[gcc-8.3/gcc/maybe_gt()]]
--[[gcc-8.3/gcc/known_eq()]]
/* This is a normal subreg. Verify that the offset is...
/* For hard registers, we already have most of these r...
subreg_offset_representable_p. */
if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
{
unsigned int regno = REGNO (reg);
if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imod...
&& GET_MODE_INNER (imode) == omode)
;
else if (!REG_CAN_CHANGE_MODE_P (regno, imode, omo...
return false;
return subreg_offset_representable_p (regno, imode...
}
-
--[[gcc-8.3/gcc/REG_P()]]
--[[gcc-8.3/gcc/HARD_REGISTER_P()]]
--[[gcc-8.3/gcc/REGNO()]]
--[[gcc-8.3/gcc/COMPLEX_MODE_P()]]
--[[gcc-8.3/gcc/VECTOR_MODE_P()]]
--[[gcc-8.3/gcc/GET_MODE_INNER()]]
--[[gcc-8.3/gcc/REG_CAN_CHANGE_MODE_P()]]
--[[gcc-8.3/gcc/subreg_offset_representable_p()]]
/* The outer size must be ordered wrt the register siz...
we wouldn't know at compile time how many registers...
mode occupies. */
if (!ordered_p (osize, regsize))
return false;
-
--[[gcc-8.3/gcc/ordered_p()]]
/* For pseudo registers, we want most of the same chec...
Assume that the pseudo register will be allocated t...
that can hold REGSIZE bytes each. If OSIZE is not ...
the remainder must correspond to the lowpart of the...
register. If BYTES_BIG_ENDIAN, the lowpart is at t...
otherwise it is at the lowest offset.
Given that we've already checked the mode and offse...
we only have to check subblock subregs here. */
if (maybe_lt (osize, regsize)
&& ! (lra_in_progress && (FLOAT_MODE_P (imode) || ...
{
/* It is invalid for the target to pick a register...
that isn't ordered wrt to the size of that mode. */
poly_uint64 block_size = ordered_min (isize, regsi...
unsigned int start_reg;
poly_uint64 offset_within_reg;
if (!can_div_trunc_p (offset, block_size, &start_r...
|| (BYTES_BIG_ENDIAN
? maybe_ne (offset_within_reg, block_size - osize)
: maybe_ne (offset_within_reg, 0U)))
return false;
}
-
--[[gcc-8.3/gcc/maybe_lt()]]
--[[gcc-8.3/gcc/FLOAT_MODE_P()]]
--[[gcc-8.3/gcc/ordered_min()]]
--[[gcc-8.3/gcc/can_div_trunc_p()]]
--[[gcc-8.3/gcc/maybe_ne()]]
return true;
}
*コメント [#t2a45f65]
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