linux-4.4.1/ioremap_nocache()(x86)
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開始行:
*参照元 [#ha514de6]
#backlinks
*説明 [#d8cea35f]
-パス: [[linux-4.4.1/arch/x86/mm/ioremap.c]]
-FIXME: これは何？
--説明
**引数 [#d4023273]
-phys_addr_t offset
--
--[[linux-4.4.1/phys_addr_t]]
-size_t size
--
--[[linux-4.4.1/size_t]]
**返り値 [#b40f55df]
-void __iomem *
--
**参考 [#vdad723e]
*実装 [#z4119e08]
/**
* ioremap_nocache - map bus memory into CPU space
* @phys_addr: bus address of the memory
* @size: size of the resource to map
*
* ioremap_nocache performs a platform specific sequence...
* make bus memory CPU accessible via the readb/readw/re...
* writew/writel functions and the other mmio helpers. T...
* address is not guaranteed to be usable directly as a ...
* address.
*
* This version of ioremap ensures that the memory is ma...
* on the CPU as well as honouring existing caching rule...
* the PCI bus. Note that there are other caches and buf...
* busses. In particular driver authors should read up o...
*
* It's useful if some control registers are in such an ...
* write combining or read caching is not desirable:
*
* Must be freed with iounmap.
*/
void __iomem *ioremap_nocache(resource_size_t phys_addr,...
{
/*
* Ideally, this should be:
* pat_enabled() ? _PAGE_CACHE_MODE_UC : _P...
*
* Till we fix all X drivers to use ioremap_wc()...
* UC MINUS. Drivers that are certain they need ...
* be converted over to strong UC can use iorema...
*/
enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC_M...
-
--[[linux-4.4.1/page_cache_mode]]
return __ioremap_caller(phys_addr, size, pcm,
__builtin_return_address...
-
--[[linux-4.4.1/__ioremap_caller()]]
-
--[[linux-4.4.1/__builtin_return_address()]]
}
EXPORT_SYMBOL(ioremap_nocache);
-
--[[linux-4.4.1/EXPORT_SYMBOL()]]
*コメント [#gd94e20e]
終了行:
*参照元 [#ha514de6]
#backlinks
*説明 [#d8cea35f]
-パス: [[linux-4.4.1/arch/x86/mm/ioremap.c]]
-FIXME: これは何？
--説明
**引数 [#d4023273]
-phys_addr_t offset
--
--[[linux-4.4.1/phys_addr_t]]
-size_t size
--
--[[linux-4.4.1/size_t]]
**返り値 [#b40f55df]
-void __iomem *
--
**参考 [#vdad723e]
*実装 [#z4119e08]
/**
* ioremap_nocache - map bus memory into CPU space
* @phys_addr: bus address of the memory
* @size: size of the resource to map
*
* ioremap_nocache performs a platform specific sequence...
* make bus memory CPU accessible via the readb/readw/re...
* writew/writel functions and the other mmio helpers. T...
* address is not guaranteed to be usable directly as a ...
* address.
*
* This version of ioremap ensures that the memory is ma...
* on the CPU as well as honouring existing caching rule...
* the PCI bus. Note that there are other caches and buf...
* busses. In particular driver authors should read up o...
*
* It's useful if some control registers are in such an ...
* write combining or read caching is not desirable:
*
* Must be freed with iounmap.
*/
void __iomem *ioremap_nocache(resource_size_t phys_addr,...
{
/*
* Ideally, this should be:
* pat_enabled() ? _PAGE_CACHE_MODE_UC : _P...
*
* Till we fix all X drivers to use ioremap_wc()...
* UC MINUS. Drivers that are certain they need ...
* be converted over to strong UC can use iorema...
*/
enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC_M...
-
--[[linux-4.4.1/page_cache_mode]]
return __ioremap_caller(phys_addr, size, pcm,
__builtin_return_address...
-
--[[linux-4.4.1/__ioremap_caller()]]
-
--[[linux-4.4.1/__builtin_return_address()]]
}
EXPORT_SYMBOL(ioremap_nocache);
-
--[[linux-4.4.1/EXPORT_SYMBOL()]]
*コメント [#gd94e20e]
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