linux-4.4.1/cpu_v7_set_pte_ext() の履歴(No.1)

• 履歴一覧
• 差分 を表示
• 現在との差分 を表示
• ソース を表示
• linux-4.4.1/cpu_v7_set_pte_ext() へ行く。
  • 1 (2016-03-08 (火) 13:06:42)
  • 2 (2016-03-08 (火) 14:47:29)

参照元†

• linux-4.4/ARMv7_MMU

説明†

• パス: 複数あり
  • CONFIG_ARM_LPAE 無効: linux-4.4.1/arch/arm/mm/proc-v7-2level.S
  • CONFIG_ARM_LPAE 有効: linux-4.4.1/arch/arm/mm/proc-v7-3level.S
  • linux-4.4.1/CONFIG_ARM_LPAE

• FIXME: これは何？
  • 説明

引数†

返り値†

参考†

実装†

CONFIG_ARM_LPAE 無効: arch/arm/mm/proc-v7-2level.S†

/*
 *      cpu_v7_set_pte_ext(ptep, pte)
 *
 *      Set a level 2 translation table entry.
 *
 *      - ptep  - pointer to level 2 translation table entry
 *                (hardware version is stored at +2048 bytes)
 *      - pte   - PTE value to store
 *      - ext   - value for extended PTE bits
 */
ENTRY(cpu_v7_set_pte_ext)
#ifdef CONFIG_MMU
        str     r1, [r0]                        @ linux version

        bic     r3, r1, #0x000003f0
        bic     r3, r3, #PTE_TYPE_MASK
        orr     r3, r3, r2
        orr     r3, r3, #PTE_EXT_AP0 | 2

        tst     r1, #1 << 4
        orrne   r3, r3, #PTE_EXT_TEX(1)

        eor     r1, r1, #L_PTE_DIRTY
        tst     r1, #L_PTE_RDONLY | L_PTE_DIRTY
        orrne   r3, r3, #PTE_EXT_APX

        tst     r1, #L_PTE_USER
        orrne   r3, r3, #PTE_EXT_AP1

        tst     r1, #L_PTE_XN
        orrne   r3, r3, #PTE_EXT_XN

        tst     r1, #L_PTE_YOUNG
        tstne   r1, #L_PTE_VALID
        eorne   r1, r1, #L_PTE_NONE
        tstne   r1, #L_PTE_NONE
        moveq   r3, #0

 ARM(   str     r3, [r0, #2048]! )
 THUMB( add     r0, r0, #2048 )
 THUMB( str     r3, [r0] )
        ALT_SMP(W(nop))
        ALT_UP (mcr     p15, 0, r0, c7, c10, 1)         @ flush_pte
#endif
        bx      lr
ENDPROC(cpu_v7_set_pte_ext)

CONFIG_ARM_LPAE 有効: arch/arm/mm/proc-v7-3level.S†

/*
 * cpu_v7_set_pte_ext(ptep, pte)
 *
 * Set a level 2 translation table entry.
 * - ptep - pointer to level 3 translation table entry
 * - pte - PTE value to store (64-bit in r2 and r3)
 */
ENTRY(cpu_v7_set_pte_ext)
#ifdef CONFIG_MMU
        tst     rl, #L_PTE_VALID
        beq     1f
        tst     rh, #1 << (57 - 32)             @ L_PTE_NONE
        bicne   rl, #L_PTE_VALID
        bne     1f

        eor     ip, rh, #1 << (55 - 32) @ toggle L_PTE_DIRTY in temp reg to
                                        @ test for !L_PTE_DIRTY || L_PTE_RDONLY
        tst     ip, #1 << (55 - 32) | 1 << (58 - 32)
        orrne   rl, #PTE_AP2
        biceq   rl, #PTE_AP2

1:      strd    r2, r3, [r0]
        ALT_SMP(W(nop))
        ALT_UP (mcr     p15, 0, r0, c7, c10, 1)         @ flush_pte
#endif
        ret     lr
ENDPROC(cpu_v7_set_pte_ext)

コメント†